Ripple counter

Problem: Since each JKFF is clocked to the previous, the ith bit only starts flipping after the (i-1)th bit finishes flipping. In a wide counter (e.g. 32 or 64 bits), this means we can't run it very fast; we have to allow sufficient time for all the signals to propagate. This goes against our modern trends of trying to build computers which are simultaneously faster and have a larger word-size.

The solution to this problem is called a "synchronous counter" (synchronous meaning "all at the same time"), shown next.

This is part of the "counter and register notes" web pages, which contain the following subtopics:

1. Ripple counter    <-- you are here
2. Synchronous counter
3. Synchronous counter with reset
4. Very simple register (parallel load)
5. Very simple shift register (serial load)
6. Designing a circuit which can shift or load
7. More realistic shift register with parallel load